Looking towards the future: in search of a cost-effective fabrication method for 6G wireless systems

Why searching for larger bandwidths urges a shift to higher frequencies and introduces price-quality hurdles. How can we overcome the current techno-economical pitfalls?
Looking towards the future: in search of a cost-effective fabrication method for 6G wireless systems
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Imagine a world where our fridge directly communicates with the supermarket or where our dryer interacts with our solar panels. Imagine cars using each other’s data to improve driving experiences or enhance weather measurements. Imagine the safety boost in a factory environment, being constantly monitored with sensors, automatically shutting down machines to prevent accidents. High demanding applications, such as multi-sensory augmented reality/virtual reality (AR/VR), tactile holography, collaborative cyber-physical systems, joint communication and sensing (JCAS) and massive machine to machine (M2M) communication, advocate the evolution towards higher frequencies, where abundant frequency spectrum is still available. Capitalizing on the beneficial atmospheric propagation conditions, D-band (110 GHz – 170 GHz) frequencies are put forward as a promising target. However, this shift brings many challenges to find a reliable and cost-effective fabrication procedure, since the wavelengths at these frequencies are only around 2.5 mm and the designed components are therefore extremely small. How may we solve these technological hurdles?

Manufacturing of tiny features? It’s no joke!

Several high-precision manufacturing technology platforms are proposed in literature, ranging from polished and plated metallic CNC milled prototypes to cleanroom alternatives based on silicon micromachined waveguide (SMW) structures. In both cases, excellent aspect ratios and reliable production are achieved. Unfortunately, in practice, these state-of-the-art solutions prove limiting, especially when considering the integration of active electronics. The mating compatibility of rectangular waveguides to chip interconnects is poor, while the (lossy) silicon substrate further complicates interfacing. Can we find an alternative fabrication method that gives us reliable, but maybe not perfect, performance, while delivering on the cost-effective bargain?

How much will this cost, kid, time is money!

The printed circuit board (PCB) technology, omnipresent in all of our current tech devices, is popular for good reason. It has always offered a cost-effective, mass-manufacturable solution that features easy integration of integrated circuits (ICs) without introducing significant amounts of losses. However, progressing towards frequencies beyond 100 GHz not only increases the dielectric losses, but also the impact of the conductor’s surface roughness. Moreover, in the terahertz frequency band (100 GHz – 10  THz), adequate performance of typical PCB laminates has not yet been thoroughly verified, nor have viable alternatives been identified or developed. Additionally, the use of antenna arrays with tens, or even hundreds, of elements, which are essential to provide sufficient signal strength despite the free-space path loss, requires a more elaborate routing network. This inherently increases the total amount of losses, ultimately limiting the maximum achievable antenna array gain. To mitigate this overall increase in losses, we have proposed the development of a multi-layer PCB stack in cooperation with AT&S, an Austrian manufacturer of high-end PCBs, including an air-filled substrate integrated waveguide (AFSIW) routing layer with smooth copper walls to reduce feed network losses to the bare minimum, as presented in Figure 1. What is so great about this proposed technology?

Figure 1: A technology platform that can do it? Our proposed PCB stack to the rescue!

The road to mass-manufacturing, is it that easy?

Thanks to the many years of experience in developing high-end PCBs, we can count on the reliable production of the proposed stack. Its cost-effectiveness is guaranteed, mainly by using standard processes for PCB manufacturing as described in the IPC-2226 standard. A significant portion of the routing losses towards the antenna elements are mitigated by introducing the highly efficient AFSIW routing layer in the middle, allowing two to ten times less loss w.r.t. conventional transmission lines. To reduce the loss in this AFSIW-based routing layer even more, additional research is needed to further increase the current height of the middle laminate while guaranteeing mechanical stability, and/or to lower the conductor surface roughness. Currently, the demonstrated operation of this proposed PCB stack shows very promising characteristics for future 6G wireless communication and sensing systems. The interfacing to chips and heat sinks is now easily provided through ball grid arrays (BGA), flip-chip die interconnects or wirebonds, which attach to the short connect transmission lines, before transitioning towards the low-loss AFSIW layer. The top layers are allocated for wideband antenna array topologies.

Let’s build our future, together!

Our hope is that our research leads to global cooperations and out-of-the-box thinking, redefining standards and evolving the technology we use today. Let’s make the world a better place for everyone, one step at the time.

(corresponding article : https://doi.org/10.1038/s41598-023-43887-0)

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Electronic Circuits and Systems
Technology and Engineering > Electrical and Electronic Engineering > Electronic Circuits and Systems
Electronics Design and Verification
Technology and Engineering > Electrical and Electronic Engineering > Electronic Circuits and Systems > Electronics Design and Verification

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