Behind the Paper

AI meets Quantum: Accelerating Failure Analysis for Scalable Qubits

The application of 3D integration techniques not only brings benefits to classical hardware architectures but also to QC technologies utilizing silicon wafer platforms. However, not without challenges for future failure analysis. AI combined with SAM fosters novel prospects in this context.

In the recent years classical computing continued to evolve, mainly driven by the increasing miniaturization and 3D integration of integrated circuits (ICs). At the same time, quantum computing (QC) emerges as a fundamentally different approach, utilizing quantum mechanical principles instead of classical binary logic. QC enable researchers to solve complex problems which are unfeasible or slow on classical computers, like molecular modeling or large-scale numerical optimization.

Among one of the most promising candidates for scalable and fault-tolerant quantum-bits (qubits) are ion trap-based quantum computers. They offer exceptional control at the atomic level and, most importantly, can be fabricated using industry-available CMOS-compatible processes. However, the transition of these QC systems from the lab to the real world still faces substantial challenges due to the high-quality standards needed in quantum systems. One of the most notable challenges in this regard is ensuring the reliability of advanced 3D integration processes like wafer bonding or through-silicon vias (TSV) fabrication. These techniques, which enable the dens packing and interconnection of qubits, are delicate and even minor defects like voids, delaminations or micro-cracks can lead to the failure of the whole device.

Traditional methods for detecting and localizing such defects employ high-resolution and non-destructive imaging like Scanning Acoustic Microscopy (SAM). However, scanning full-scale wafers at high resolutions is time-consuming and, therefore, expensive.

To address this limitation, the group Brunner at Materials Center Leoben (MCL) and in particluar PhD student Raphael Wilhelmer together with a team at Infineon and PVA-TePla introduced an AI-enhanced image analysis workflow that can significantly accelerate and improve defect detection capabilities in ion trap-based hardware.

The workflow starts by doing a fast, large-area SAM scan of e.g. a bonded wafer or TSV structures with low resolution. These low-resolution images are then enhanced afterwards by employing a machine learning-based super-resolution algorithm. Among the various models tested in the study, the DCSCN (deep convolutional neural network with residual net, skip connection and a network in network) architecture delivered the best performance when balancing image quality, generalizability and energy consumption during training.

DCSCN allowed the researchers to increase the resolution of SAM images by a factor of two, while also avoiding common pitfalls like generative AI hallucinations, which may introduce false and unphysical structures into the image.

The enhanced images are then passed to advanced machine learning-based object detection and segmentation algorithms. As shown, the YOLO (You Only Look Once) object detection model preforms significantly better on the enhanced images and, additionally, delivers speedups in failure analysis compared to traditional automated methods. For tasks such as identifying large scale delaminations at bonded wafer interfaces, a U-Net segmentation is employed, again showing increased performance when applied to the enhanced images. Together, these tools provide statistically relevant improvements in analyzing large scale failure data and enable more informed decision making during the process development and manufacturing phases.

For the samples tested in this study, the AI-powered workflow decreases scanning and analysis times by roughly a factor of four for TSV inspection and six for delamination analysis. Most importantly, it does so without compromising failure analysis accuracy and without physically damaging the sample by using non-destructive SAM.

Although this AI-based workflow was developed and tested in the context of ion trap quantum devices, it is broadly applicable across all of semiconductor manufacturing. From classical IC production to MEMS or photonics, every technology relying on complex 3D integration can benefit from a faster and more automated non-destructive analysis workflow. The study itself offers a compelling example of how artificial intelligence can combine high-precision measurements with fast scanning speeds and how to apply them in high-throughput industrial environments.

See for more details in:

AI image enhancement for failure analysis in 3D quantum information technology | Scientific Reports