Imaging of electric field distribution in electronic devices

My group at the University of Bristol has been working since many years on thermal management and reliability of wide and ultra-wide bandgap devices, experimentally and simulation; what always bugged us there is no way to "see" and quantify electric fields in devices, we always had to simulate them.
Imaging of electric field distribution in electronic devices
Like

Share this post

Choose a social network to share with, or copy the shortened URL to share elsewhere

This is a representation of how your post may appear on social media. The actual post will vary between social networks

The electric field in electronic devices drives degradation phenomena, limiting their lifetime. And electric fields are increasingly important considering that researchers aim at higher and higher voltages and powers, for RF as well as power electronics. For example, GaN high electron mobility transistors (HEMTs) typically exhibit lateral fields of 1-2 MV/cm, more than 5 times higher than the breakdown field of Si devices. We and others use technology computer aided design (TCAD) simulations to predict device operation including the electric field distribution, but who knows whether the electric fields we obtain from the simulation actually reflect reality - we have been using electrical characterization e.g. an experimental IV curve to calibrate the simulation but different electric field distribution can give rise to rather similar IV curves; correspondingly if there is current passing through the region of high electric field, we can use optical beam induced current (OBIC) or thermal mapping to try to test the simulation - but e.g. thermal diffusion lengths are rather large and not in all regions where there is a large electric field there is a current i.e. there is sizable heat generation. Our work published in Nature Electronics solves this conundrum - we can finally "see" the electric fields - for this we use second harmonic light generation. We hope this will gives device engineers a powerful new handle for new device testing and design. We presently achieve submicron spatial resolution, but continue working on improving spatial resolution to even the nanometer scale. The idea of this work goes back many years to when I was visiting researchers in Nagoya, Japan, and had very fruitful discussions there on current device challenges. We have spent the last two years in developing and optimizing the technique and approach, and hope other can benefit from this new experimental technique for electronic device research.

The paper can be found on https://www.nature.com/articles/s41928-021-00599-5,  the full paper at https://rdcu.be/cmVPw and a news article related to it on https://techxplore.com/news/2021-06-scientists-energy-technique-paving-carbon.html.

Please sign in or register for FREE

If you are a registered user on Research Communities by Springer Nature, please sign in

Subscribe to the Topic

Electrical and Electronic Engineering
Technology and Engineering > Electrical and Electronic Engineering